1. Field of the Invention
The present invention generally relates to a quad flat package (QFP), and more particularly, to a quad flat non-leaded (QFN) package.
2. Description of Related Art
The production of integrated circuits (IC) includes IC design, IC process and IC package. The package may prevent the chip from influence of external temperature and humidity, and from contamination of dust, and may provide an intermedium for connecting the chip to external circuits.
Chip package is categorized into various package types. Here, the quad flat non-leaded package belonging to the category of quad flat package and characterized by short signal transmission path and rapid signal transmission speed is suitable for high frequency (i.e. radio frequency bandwidth) chip package, and thus becomes one of the main options of low pin count package.
In a conventional manufacturing method of quad flat non-leaded package, chips are disposed on a leadframe. Next, the chips are electrically connected to the leadframe via bonding wires. Thereafter, a portion of the leadframe, the bonding wires, and the chips are encapsulated by a molding compound. Finally, the aforementioned structure is singularized through the punch process or the sawing process to form a plurality of quad flat non-leaded packages.